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Data Sheet No. PD94701
IRU3138
SYNCHRONOUS PWM CONTROLLER FOR TERMINATION POWER SUPPLY APPLICATIONS FEATURES
1A Peak Output Drive Capability 0.8V Precision Reference Voltage Available Shuts off both drivers at shorted output and shutdown 200KHz to 400KHz operation set by an external resistor Soft-Start Function Uncommitted Error Amplifier available for DDR voltage tracking application Protects the output when control FET is shorted Synchronous Controller in 14-Pin Package
DESCRIPTION
The IRU3138 controller IC is designed to provide a low cost synchronous Buck regulator for voltage tracking applications such DDR memory and general purpose on-board DC to DC converter. Modern micro processors combined with DDR memory, need high-speed bandwidth data bus which requires a particular bus termination voltage. This voltage will be tightly regulated to track the half of chipset voltage for best performance. The IRU3138 together with two N-channel MOSFETs, provide a low cost solution for such applications. This device features a programmable frequency set from 200KHz to 400KHz, under-voltage lockout for both Vcc and Vc supplies, an external programmable soft-start function as well as output under-voltage detection that latches off the device when an output short is detected.
APPLICATIONS
DDR memory source sink Vtt application Graphic Card Low cost on-board DC to DC such as 5V to 3.3V, 2.5V or 1.8V
TYPICAL APPLICATION
5V VDDQ (2.5V)
C1 0.1uF
12V
C2 1uF C3 2x 47uF
L1 1uH C4 47uF
DDR Memory
R1 1K
Vcc VREF VP
Vc HDrv
Q1 IRF7460 D1 BAT54 L2 3.3uH
R2 1K
SS/SD
C5 0.1uF
U1 IRU3138
LDrv PGnd Fb
Vtt 1.25V @ 10A
C6 2x 150uF 40m V
Q2 IRF7456
Rt Comp
C7 3300pF R3 13K
Gnd
Figure 1 - Typical application of IRU3138 when VTT tracks the VDDQ.
PACKAGE ORDER INFORMATION
TA (C) 0 To 70 DEVICE IRU3138CS PACKAGE 14-Pin Plastic SOIC NB (S)
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IRU3138
ABSOLUTE MAXIMUM RATINGS
VCC Supply Voltage .................................................. -0.5V - 25V VC Supply Voltage .................................................... -0.5V - 25V Storage Temperature Range ...................................... -65C To 150C Operating Junction Temperature Range ..................... 0C To 125C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.
PACKAGE INFORMATION
14-PIN PLASTIC SOIC NB (S)
Fb 1 VP 2 V REF 3 Vcc 4 NC 5 LDrv 6 Gnd 7 14 NC 13 SS/SD 12 Comp 11 Rt 10 Vc 9 HDrv 8 PGnd
uJA=888C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and TA=0 to 70C. Typical values refer to TA=25C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Reference Voltage VREF Voltage Fb Voltage Line Regulation UVLO UVLO Threshold - VCC UVLO Hysteresis - VCC UVLO Threshold - VC UVLO Hysteresis - VC UVLO Threshold - Fb UVLO Hysteresis - Fb Supply Current VCC Dynamic Supply Current VC Dynamic Supply Current VCC Static Supply Current VC Static Supply Current Soft-Start Section Charge Current Oscillator Frequency Ramp Amplitude SYM
VFB LREG
TEST CONDITION
MIN 0.784
TYP 0.8
MAX 0.816 1.6 4.5 3.65 0.5
UNITS V mV V V V V V V mA mA mA mA mA KHz V
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5UVLO Vcc Supply Ramping Up UVLO Vc UVLO Fb
Supply Ramping Up Fb Ramping Down Note 1 Freq=200KHz, CL=3000pF Freq=200KHz, CL=3000pF SS=0V SS=0V SS=0V Rt=Open Rt=Gnd Note 1 www.irf.com
Dyn Icc Dyn Ic ICCQ ICQ SSIB Freq VRAMP
8 14 6 4 26 220 440
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IRU3138
PARAMETER Error Amp Fb Voltage Input Bias Current Fb Voltage Input Bias Current VP Voltage Range Transconductance Output Drivers Rise Time Fall Time Dead Band Time Max Duty Cycle Min Duty Cycle SYM
IFB1 IFB2 GM Tr Tf TDB Ton Toff
TEST CONDITION SS=3V, Fb=1V SS=0V, Fb=1V
MIN
TYP 0.1 50
MAX
UNITS mA mA V mmho ns ns ns % %
0.7 500 CLOAD=3000pF CLOAD=3000pF Fb=0.7V, Freq=200KHz Fb=1.5V 85
800 35 35 100 90
1.5 1000 70 70
0
Note 1: Guaranteed by design, but not tested in production.
PIN DESCRIPTIONS
PIN# 1 2 3 4 PIN SYMBOL PIN DESCRIPTION Fb This pin is connected directly to the output of the switching regulator via resistor divider to provide feedback to the Error amplifier. VP Non-inverting input of error amplifier. VREF Reference Voltage. VCC This pin provides biasing for the internal blocks of the IC as well as power for the low side driver. A minimum of 1mF, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. NC No Connection. LDrv Gnd PGnd Output driver for the synchronous power MOSFET. Analog ground for internal reference and control circuitry. Connect to PGnd with a short trace. This pin serves as the separate ground for MOSFET's drivers and should be connected to system's ground plane. A high frequency capacitor (0.1mF to 1mF) must be connected from VCC and VC pins to this pin for noise free operation. Output driver for the high side power MOSFET. This pin should not go negative (below ground), this may cause problem for the gate drive circuit. It can happen when the inductor current goes negative (Source/Sink), soft-start at no load and for the fast load transient from full load to no load. To prevent negative voltage at gate drive, a low forward voltage drop diode might be connected between this pin and ground. This pin is connected to a voltage that must be at least 4V higher than the bus voltage of the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A minimum of 1mF, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. The switching frequency can be Programmed between 200KHz and 400KHz by connecting a resistor between Rt and Gnd. Floating the pin set the switching frequency to 200KHz and grounding the pin set the switching frequency to 400KHz. Compensation pin of the error amplifier. An external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. This pin provides soft-start for the switching regulator. An internal current source charges an external capacitor that is connected from this pin to ground which ramps up the output of the switching regulator, preventing it from overshooting as well as limiting the input current. The converter can be shutdown by pulling this pin below 2.8V. www.irf.com
5 14 6 7 8
9
HDrv
10
VC
11
Rt
12
Comp
13
SS / SD
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IRU3138
BLOCK DIAGRAM
Vcc 4 0.8V 1.25V POR 4.25V 11 Rt 10 Vc Rt 20uA Oscillator 3.5V 64uA Max Error Comp POR R Reset Dom 25K VP 2 25K Fb 1 0.4V FbLo Comp 2.8V 8 PGnd 7 Gnd Comp 12 POR SS Error Amp 6 LDrv Q Vcc Ct S SS/SD 13 9 HDrv 0.25V Bias Generator 3V 1.25V
VREF 3
3V
Vc
0.2V
Figure 2 - Simplified block diagram of the IRU3138.
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IRU3138
THEORY OF OPERATION
Introduction The IRU3138 is a fixed frequency, voltage mode synchronous controller and consists of a precision reference voltage, an error amplifier, an internal oscillator, a PWM comparator, 1A peak gate driver, soft-start and shutdown circuits (see Block Diagram). The output voltage of the synchronous converter is set and controlled by the output of the error amplifier; this is the amplified error signal from the sensed output voltage and the reference voltage. This voltage is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulses of variable duty-cycle, which drives the two N-channel external MOSFETs.The timing of the IC is provided through an internal oscillator circuit which uses on-chip capacitor. The oscillation frequency is programmable between 200KHz to 400KHz by using an external resistor. Figure 4A shows switching frequency vs. external resistor. Soft-Start The IRU3138 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. To ensure correct start-up, the soft-start sequence initiates when the Vc and Vcc rise above their threshold (3.5V and 4.25V respectively) and generates the Power On Reset (POR) signal. Soft-start function operates by sourcing an internal current to charge an external capacitor to about 3V. Initially, the soft-start function clamps the E/A's output of the PWM converter and disables the short circuit protection. During the power up, the output starts at zero and voltage at Fb is below 0.4V. The feedback UVLO is disabled during this time by injecting a current (64mA) into the Fb. This generates a voltage about 1.6V (64mA325K) across the negative input of E/A and positive input of the feedback UVLO comparator (see Fig3).
20uA SS/SD 3V
The magnitude of this current is inversely proportional to the voltage at soft-start pin. The 20mA current source starts to charge up the external capacitor. In the mean time, the soft-start voltage ramps up, the current flowing into Fb pin starts to decrease linearly and so does the voltage at the positive pin of feedback UVLO comparator and the voltage negative input of E/A. When the soft-start capacitor is around 1V, the current flowing into the Fb pin is approximately 32mA. The voltage at the positive input of the E/A is approximately: 32mA325K = 0.8V The E/A will start to operate and the output voltage starts to increase. As the soft-start capacitor voltage continues to go up, the current flowing into the Fb pin will keep decreasing. Because the voltage at pin of E/A is regulated to reference voltage 0.8V, the voltage at the Fb is: VFB = 0.8-25K3(Injected Current) The feedback voltage increases linearly as the injecting current goes down. The injecting current drops to zero when soft-start voltage is around 2V and the output voltage goes into steady state. As shown in Figure 4, the positive pin of feedback UVLO comparator is always higher than 0.4V, therefore, feedback UVLO is not functional during soft-start.
Output of UVLO POR
3V
2V 1V
Soft-Start Voltage Current flowing into Fb pin 0V 64uA 0uA
64uA Max
HDrv
POR Comp 25K 0.8V 25K Fb Error Amp LDrv
Voltage at negative input of Error Amp and Feedback UVLO comparator
1.6V
0.8V
0.8V 0V
Voltage at Fb pin
0.4V
64uA325K=1.6V When SS=0
POR Feeback UVLO Comp
Figure 4 - Theoretical operational waveforms during soft-start.
Figure 3 - Soft-start circuit for IRU3138.
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IRU3138
the output start-up time is the time period when softstart capacitor voltage increases from 1V to 2V. The startup time will be dependent on the size of the external soft-start capacitor. The start-up time can be estimated by: 20mA3TSTART/CSS = 2V-1V For a given start up time, the soft-start capacitor can be estimated as: CSS 20mA3TSTART/1V MOSFET Drivers The driver capabilities of both high and low side drivers are optimized to maintain fast switching transitions. They are sized to drive a MOSFET that can deliver up to 20A output current. The low side MOSFET driver is supplied directly by VCC while the high side driver is supplied by VC. An internal dead time control is implemented to prevent cross-conduction and allows the use of several kinds of MOSFETs. Short-Circuit Protection The outputs are protected against the short-circuit. The IRU3138 protects the circuit for shorted output by sensing the output voltage (through the external resistor divider). The IRU3138 turns off both drivers, when the output voltage drops below 0.4V. The IRU3138 also protects the output from over-voltaging when the control FET is shorted. This is done by turning on the sync FET with the maximum duty cycle. Under-Voltage Lockout The under-voltage lockout circuit assures that the MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if Vc and Vcc fall below 3.5V and 4.25V respectively. Normal operation resumes once Vc and Vcc rise above the set values. Shutdown The converter can be shutdown by pulling the soft-start pin below 2.8V. This can be easily done by using an external small signal transistor. During shutdown both MOSFET drivers turn off.
Switching Frequency VS. RT
450 400 350 300 Fs (KHz) 250 200 150 100 50 0 0 10 20 30 40 50 RT Figure 4A - Switching frequency vs. external resistor 60 70 80 90 100
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IRU3138
APPLICATION INFORMATION
Design Example: The following example is a typical application for IRU3138, the schematic is Figure 13 on page 15. VIN = VCC = 5V Supply Voltage VOUT = 1.6V VC = 12V IOUT = 12A DVOUT = 50mV (output voltage ripple 3% of VOUT) fS = 400KHz Output Voltage Programming Output voltage is programmed by reference voltage and external voltage divider. The Fb pin is the inverting input of the error amplifier, which is referenced to the voltage on non-inverting pin of error amplifier. The output voltage is defined by using the following equation: VOUT = VP3 1 + VP = VREF = 0.8V When an external resistor divider is connected to the output as shown in Figure 5. Css = 203tSTART (mF) ---(8) Where tSTART is the desired start-up time (ms) For a start-up time of 5ms, the soft-start capacitor will be 0.1mF. Choose a ceramic capacitor at 0.1mF. Boost Supply Vc To drive the high side switch, it is necessary to supply a gate voltage at least 4V grater than the bus voltage. For single supply applications, this is achieved by using a charge pump configuration as shown in Figure 6. This method is simple and inexpensive. The operation of the circuit is as follows: when the lower MOSFET is turned on, the capacitor (C1) is pulled down to ground and charges, up to VBUS value, through the diode (D1). The bus voltage will be added to this voltage when upper MOSFET turns on in next cycle, and providing supply voltage (Vc) through diode (D2). Vc is approximately: VC 2 3 VBUS - (VD1 + VD2) Capacitors in the range of 0.1mF and 1mF are generally adequate for most applications. The diode must be a fast recovery device to minimize the amount of charge fed back from the charge pump capacitor into Vc. The diodes need to be able to block the full power rail voltage, which is seen when the high side MOSFET is switched on. For low voltage application, schottky diodes can be used to minimize forward drop across the diodes at start up. For this application, Vc is biased by an external 12V supply.
VBUS
(
R6 R5
)
---(7)
VOUT IRU3138
VP Fb VREF R5 R6
Figure 5 - Typical application of the IRU3138 for programming the output voltage. Equation (7) can be rewritten as: R6 = R5 3
IRU3138
Vc C2
D2 C1
D1 Q1 L2
(
VOUT -1 VP
)
Choose R5 = 1K This will result to R6 = 1K If the high value feedback resistors are used, the input bias current of the Fb pin could cause a slight increase in output voltage. The output voltage set point can be more accurate by using precision resistor. Soft-Start Programming The soft-start timing can be programmed by selecting the soft-start capacitance value. The start-up time of the converter can be calculated by using:
HDrv
Q2
Figure 6 - Charge pump circuit. Input Capacitor Selection The input filter capacitor should be based on how much ripple the supply can tolerate on the DC input line. The ripple current generated during the on time of upper MOSFET should be provided by input capacitor. The RMS value of this ripple is expressed by:
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IRU3138
IRMS = IOUT D3(1-D) ---(9) Where: D is the Duty Cycle, D=VOUT/VIN. IRMS is the RMS value of the input capacitor current. IOUT is the output current for each channel. For VIN=5V, IOUT=12A and D=0.36, the IRMS=5.7A For higher efficiency, a low ESR capacitor is recommended. Choose three Poscap from Sanyo 6TPC150M (6.3V, 150mF, 40mV) with a maximum allowable ripple current of 5.7A. Inductor Selection The inductor is selected based on operating frequency, transient performance and allowable output voltage ripple. Low inductor value results to faster response to step load (high Di/Dt) and smaller size but will cause larger output ripple due to increase of inductor ripple current. As a rule of thumb, select an inductor that produces a ripple current of 10-40% of full load DC. For the buck converter, the inductor value for desired operating ripple current can be determined using the following relation: Di 1 VOUT VIN - VOUT = L3 ; Dt = D3 ;D= Dt fS VIN VOUT L = (VIN - VOUT)3 ---(11) VIN3Di3fS Where: VIN = Maximum Input Voltage VOUT = Output Voltage i = Inductor Ripple Current fS = Switching Frequency t = Turn On Time D = Duty Cycle If Di = 25%(IO), then the output inductor will be: L = 0.91mH The Panasonic PCCN6B series provides a range of inductors in different values, low profile suitable for large currents, 1.1mH, 16A is a good choice for this application. This will result to a ripple approximately 22% of output current. Output Capacitor Selection The criteria to select the output capacitor is normally based on the value of the Effective Series Resistance (ESR). In general, the output capacitor must have low enough ESR to meet output ripple and load transient requirements, yet have high enough ESR to satisfy stability requirements. The ESR of the output capacitor is calculated by the following relationship: ESR [ DVO DIO ---(10)
Where: DVO = Output Voltage Ripple Di = Inductor Ripple Current DVO = 50mV and DI 22% of 12A = 2.64A This results to: ESR=18.9mV The Sanyo TPC series, Poscap capacitor is a good choice. The 6TPC330M, 330mF, 6.3V has an ESR 40mV. Selecting three of these capacitors in parallel, results to an ESR of 13.3mV which achieves our low ESR goal. The capacitor value must be high enough to absorb the inductor's ripple current. The larger the value of capacitor, the lower will be the output ripple voltage. Power MOSFET Selection The IRU3138 uses two N-Channel MOSFETs. The selections criteria to meet power transfer requirements is based on maximum drain-source voltage (VDSS), gatesource drive voltage (VGS), maximum output current, Onresistance RDS(ON) and thermal management. The MOSFET must have a maximum operating voltage (VDSS) exceeding the maximum input voltage (VIN). The gate drive requirement is almost the same for both MOSFETs. Logic-level transistor can be used and caution should be taken with devices at very low VGS to prevent undesired turn-on of the complementary MOSFET, which results a shoot-through current. The total power dissipation for MOSFETs includes conduction and switching losses. For the Buck converter, the average inductor current is equal to the DC load current. The conduction loss is defined as: PCOND(Upper Switch) = ILOAD 23RDS(ON)3D3q PCOND(Lower Switch) = ILOAD 23RDS(ON)3(1 - D)3q q = RDS(ON) Temperature Dependency The RDS(ON) temperature dependency should be considered for the worst case operation. This is typically given in the MOSFET data sheet. Ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget.
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IRU3138
Choose IRLR3715Z for control MOSFET and IRFR3711Z for synchronous MOSFET. These devices provide low on-resistance in a D-Pak. The MOSFETs have the following data: IRFL3715Z VDSS = 20V RDS(ON) = 11mV IRFR3711Z VDSS = 20V RDS(ON) = 5.7mV These values are taken under a certain condition test. For more details please refer to the IRFR3711Z datasheet. By using equation (12), we can calculate the total switching losses. PSW(TOTAL) = 336mW Feedback Compensation The IRU3138 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. To achieve fast transient response and accurate output regulation, a compensation circuit is necessary. The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin (greater than 458). The output LC filter introduces a double pole, -40dB/ decade gain slope above its corner resonant frequency, and a total phase lag of 1808 (see Figure 8). The Resonant frequency of the LC filter is expressed as follows: FLC = 1 2p3 LO3CO ---(13)
The total conduction losses will be: PCON(TOTAL) = PCON(UPPER) + PCON(LOWER) PCON(TOTAL) = 1.77W The switching loss is more difficult to calculate, even though the switching transition is well understood. The reason is the effect of the parasitic components and switching times during the switching procedures such as turn-on / turnoff delays and rise and fall times. The control MOSFET contributes to the majority of the switching losses in synchronous Buck converter. The synchronous MOSFET turns on under zero voltage conditions, therefore, the turn on losses for synchronous MOSFET can be neglected. With a linear approximation, the total switching loss can be expressed as: VDS(OFF) tr + tf 3 3 ILOAD ---(12) 2 T Where: VDS(OFF) = Drain to Source Voltage at off time tr = Rise Time tf = Fall Time T = Switching Period ILOAD = Load Current PSW = The switching time waveform is shown in Figure 7.
VDS 90%
Figure 9 shows gain and phase of the LC filter. Since we already have 1808 phase shift just from the output filter, the system risks being unstable.
Gain 0dB -40dB/decade Phase 08
-1808 FLC Frequency
FLC
Frequency
Figure 8 - Gain and phase of LC filter.
10% VGS td(ON) tr td(OFF) tf
Figure 7 - Switching time waveforms. From IRFR3711Z data sheet we obtain: IRFR3711Z
tr = 13ns tf = 15ns
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The IRU3138's error amplifier is a differential-input transconductance amplifier. The output is available for DC gain control or AC phase compensation. The E/A can be compensated with or without the use of local feedback. When operated without local feedback, the transconductance properties of the E/A become evident and can be used to cancel one of the output filter poles. This will be accomplished with a series RC circuit from Comp pin to ground as shown in Figure 9. Note that this method requires that the output capacitor should have enough ESR to satisfy stability requirements. In general, the output capacitor's ESR generates a zero typically at 5KHz to 50KHz which is essential for an acceptable phase margin. The ESR zero of the output capacitor expressed as follows: 1 FESR = ---(14) 2p3ESR3Co
VOUT R6 Fb
First select the desired zero-crossover frequency (Fo): Fo > FESR and FO [ (1/5 ~ 1/10)3fS Use the following equation to calculate R4: 1 VOSC Fo3FESR R5 + R6 R4 = 3 3 3 gm VIN FLC2 R5
---(18)
Where: VIN = Maximum Input Voltage VOSC = Oscillator Ramp Voltage Fo = Crossover Frequency FESR = Zero Frequency of the Output Capacitor FLC = Resonant Frequency of the Output Filter R5 and R6 = Resistor Dividers for Output Voltage Programming gm = Error Amplifier Transconductance For: VIN = 5V VOSC = 1.25V Fo = 40KHz FESR = 12KHz This results to R4=17.32K Choose R4=17.8K FLC = 4.82KHz R5 = 1K R6 = 1K gm = 600mmho
R5 Vp=VREF
Gain(dB)
E/A
Comp V e C9 R4 Optional
To cancel one of the LC filter poles, place the zero before the LC filter resonant frequency pole: FZ 75%FLC FZ 0.753 1 2p LO 3 CO FZ = 3.6KHz R4 = 17.8K ---(19)
H(s) dB
For: Lo = 1.1mH Co = 990mF
FZ
Frequency
Using equations (17) and (19) to calculate C9, we get: C9 2.4nF; Choose C9 =2.2nF One more capacitor is sometimes added in parallel with C9 and R4. This introduces one more pole which is mainly used to suppress the switching noise. The additional pole is given by: FP = 1 2p3R43 C93CPOLE C9 + CPOLE
Figure 9 - Compensation network without local feedback and its asymptotic gain plot. The transfer function (Ve / VOUT) is given by: H(s) = gm3
(
R5 1 + sR4C9 3 R6 + R5 sC9
)
---(15)
The (s) indicates that the transfer function varies as a function of frequency. This configuration introduces a gain and zero, expressed by: |H(s=j32p3FO)| = gm3 FZ = 1 2p3R43C9 R5 3R4 R63R5 ---(17) ---(16)
|H(s)| is the gain at zero cross frequency.
The pole sets to one half of switching frequency which results in the capacitor CPOLE: 1 1 CPOLE = p3R43fS 1 p3R43fS C9 For FP << fS/2 R4=17.8K and FS=400KHz will result to CPOLE=44pF. Choose CPOLE=47pF.
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IRU3138
For a general solution for unconditionally stability for ceramic capacitor with very low ESR and any type of output capacitors, in a wide range of ESR values we should implement local feedback with a compensation network. The typically used compensation network for voltage-mode controller is shown in Figure 10.
ZIN C10 R8 R6 Fb R5 Vp=V REF
Gain(dB)
FP1 = 0 FP2 = FP3 = 1 2p3R83C10 1 2p3R73 FZ1 =
( C123C11) C12+C11
1 2p3R73C12
VOUT
C12 R7 C11 Zf
1 2p3R73C11
1 1 FZ2 = 2p3C103(R6 + R8) 2p3C103R6 Cross Over Frequency:
E/A
Comp
V e
FO = R73C103
VIN 1 3 VOSC 2p3Lo3Co
---(21)
H(s) dB
Where: VIN = Maximum Input Voltage VOSC = Oscillator Ramp Voltage Lo = Output Inductor Co = Total Output Capacitors The stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. The consideration has been taken to satisfy condition (20) regarding transconductance error amplifier. These design rules will give a crossover frequency approximately one-tenth of the switching frequency. The higher the band width, the potentially faster the load transient speed. The gain margin will be large enough to provide high DC-regulation accuracy (typically -5dB to 12dB). The phase margin should be greater than 458 for overall stability. Based on the frequency of the zero generated by ESR versus crossover frequency, the compensation type can be different. The table below shows the compensation type and location of crossover frequency. Compensator Location of Zero Typical Type Crossover Frequency Output (FO) Capacitor Type II (PI) FPO < FZO < FO < fS/2 Electrolytic, Tantalum Type III (PID) FPO < FO < FZO < fS/2 Tantalum, Method A Ceramic Type III (PID) FPO < FO < fS/2 < FZO Ceramic Method B Table - The compensation type and location of zero crossover frequency. Detail information is dicussed in application Note AN1043 which can be downloaded from the IR Web-Site.
FZ1
FZ2
FP2
FP3
Frequency
Figure 10 - Compensation network with local feedback and its asymptotic gain plot. In such configuration, the transfer function is given by: Ve 1 - gmZf = VOUT 1 + gmZIN The error amplifier gain is independent of the transconductance under the following condition: gmZf >> 1 and gmZIN >>1 ---(20)
By replacing ZIN and Zf according to Figure 7, the transformer function can be expressed as: H(s) = (1+sR7C11)3[1+sC10(R6+R8)] 1 3 sR6(C12+C11) C12C11 1+sR7 C12+C11 3(1+sR8C10)
[
(
)]
As known, transconductance amplifier has high impedance (current source) output, therefore, consider should be taken when loading the E/A output. It may exceed its source/sink output current capability, so that the amplifier will not be able to swing its output voltage over the necessary range. The compensation network has three poles and two zeros and they are expressed as follows:
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IRU3138
Layout Consideration The layout is very important when designing high frequency switching converters. Layout will affect noise pickup and can cause a good design to perform with less than expected results. Start to place the power components. Make all the connections in the top layer with wide, copper filled areas. The inductor, output capacitor and the MOSFET should be close to each other as possible. This helps to reduce the EMI radiated by the power traces due to the high switching currents through them. Place input capacitor directly to the drain of the high-side MOSFET. To reduce the ESR, replace the single input capacitor with two parallel units. The feedback part of the system should be kept away from the inductor and other noise sources and be placed close to the IC. In multilayer PCB, use one layer as power ground plane and have a separate control circuit ground (analog ground), to which all signals are referenced. The goal is to localize the high current path to a separate loop that does not interfere with the more sensitive analog control function. These two grounds must be connected together on the PC board layout at a single point.
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IRU3138 TYPICAL APPLICATION
Single Supply 5V Input
5V
D2 BAT54 D1 BAT54S L1 1uH C3 0.1uF C4 1uF C5 0.1uF Q1 IRF7457 D3 BAT54 Q2 IRF7457 C2 3x 6TPB150M, 150uF, 40mV C1 47uF
Vcc VREF
C8 0.1uF
Vc HDrv
VP
C8 0.1uF
U1 IRU3138
LDrv PGnd
L2 3.3uH
SS/SD Rt Comp
C9 3.3nF C6 68pF
3.3V @ 12A
C7 2x 6TPC330M, 330uF, 40mV
R6
Fb Gnd
3.16K, 1%
R4 18K
R5 1K, 1%
Figure 11 - Typical application of IRU3138 in an on-board DC-DC converter using a single 5V supply.
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IRU3138 TYPICAL APPLICATION
5V
C1 1uF
12V
C2 1uF C5 4x 150uF 6TPB150M
L1 1uH C4 47uF
5V
Vcc SS
C6 0.1uF
Vc HDrv
D1 1N4148 Q1 IRF3711S L2 2.2uH
U1 IRU3137
LDrv
Q2 IRF3711S
VDDQ 1.8V @ 15A
C7 3x 330uF 6TPC330M
Comp
C15 68pF C8 3300pF R2 20K
R1
Fb Gnd
1.25K
R3 1K
5V
C9 1uF
12V
C10 1uF C11 3x 150uF 6TPB150M
R4 1K
Vcc VREF VP
Vc HDrv
Q3 IRF7460 D2 1N4148 Q4 IRF7457 L3 2.2uH
R5 1K C12 0.15uF
SS
U2 IRU3138
LDrv PGnd Fb
VTT (0.9V @ 10A)
C13 3x 330uF 6TPC330M
Rt Comp
C16 47pF C14 6800pF R6 12K
Gnd
Figure 12 - Typical application of IRU3137 for DDR memory when the termination voltage, generated by IRU3138, tracks the core voltage.
14
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Rev. 1.0 01/29/04
IRU3138
DEMO-BOARD APPLICATION
5V to 2.5V @ 12A
L1
VIN 5V Gnd 12V
1uH C1 150uF C18 150uF C19 150uF C20 150uF
C4 1uF
C6 1uF
C3 1uF
Vcc VP
Vc HDrv
D3 Q1 L2 1.1uH
C2 100pF
VREF
U1 IRU3138
Rt
Q2
C9 470pF R6 4.7V
VOUT 1.6V @ 12A
C11 330uF C22 330uF C12 C21 330uF 1uF
C8 0.1uF
SS/SD
LDrv PGnd
R8
Comp
C15 2.2nF R9 17.8K
Gnd
1K
Gnd
Fb
R11 1K
Figure 13 - Demo-board application of IRU3138.
Application Parts List Ref Desig Q1 Q2 U1 D3 L1 L2 C1,C2,C18,C20 C3,C4,C6,C12 C7 C8 C9 C11,C21,C22 C15 R6 R8,R11 R9
Rev. 1.0 01/29/04
Description MOSFET MOSFET Controller Diode Inductor Inductor Capacitor, Poscap Capacitor, Ceramic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Poscap Capacitor, Ceramic Resistor Resistor Resistor
Value Qty Part# 20V, 11mV 1 IRLR3715Z 20V, 5.7mV 1 IRFR3711Z Synchronous PWM 1 IRU3138 Fast Switching 1 BAT54 1mH, 10A 1 D03316P-102HC 1.1mH 1 ETQP6F1R1BFA 150mF, 6.3V 4 6TPC150M 1mF, Y5V, 16V 4 ECJ-SVF1C105Z 100pF, 50V 1 ECJ-2VC1H101J 0.1mF, Y5V, 25V 1 ECJ-2VF1E104Z 470pF, X7R, 50V 1 ECJ-2VC1H471J 330mF, 6.3V 3 6TPC330M 2.2nF, X7R, 50V 1 ECJ-2VB1H222K 4.7V, 5% 1 1K 2 17.8K 1 www.irf.com
Manuf IR IR IR IR Coilcraft Panasonic Sanyo Panasonic Panasonic Panasonic Panasonic Sanyo Panasonic
15
IRU3138 TYPICAL OPERATING CHARACTERISTICS
Vin=5.0V,Vout=1.6V
92 90 Efficiency (%) 88 86 84 82 80 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Output Current (A)
Figure 14 - Efficiency for IRU3138 Evaluation Board
Figure 15 - Start-up time Ch2:VC, Ch3:SS pin, Ch4:Vout
Figure 17 - Output Voltage Ripple @ 15A Figure 16 - Shut Down the output by pulling down the Ch1:Output, Ch4:Iout (5A/Div) soft-start pin Ch1: HDrv, Ch2:LDrv, Ch3: SS pin
Figure 18 - Transient response @ Iout=15A Ch1: Output, Ch4:Iout (5A/Div)
16
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Rev. 1.0 01/29/04
IRU3138
(S) SOIC Package 14-Pin Surface Mount, Narrow Body
H A B C
E
DETAIL-A PIN NO. 1 D 0.386 0.015 x 458 TF K
L
DETAIL-A
I
G 14-PIN SYMBOL A B C D E F G H I J K L T MIN MAX 8.56 8.74 1.27 BSC 0.51 REF 0.36 0.46 3.81 3.99 1.52 1.72 0.10 0.25 78 BSC 0.19 0.25 5.80 6.20 08 88 0.41 1.27 1.37 1.57
J
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
Rev. 1.0 01/29/04
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17
IRU3138
PACKAGE SHIPMENT METHOD
PKG DESIG S PACKAGE DESCRIPTION SOIC, Narrow Body PIN COUNT 14 PARTS PER TUBE 55 PARTS PER REEL 2500 T&R Orientation Fig A
1
1
1
Feed Direction Figure A
This product has been designed and qualified for the consumer market.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01
18
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Rev. 1.0 01/29/04

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